Millions of people experience Synaptics every day. Our technology impacts how people see, hear, touch, and engage with a wide range of IoT applications -- at home, at work, in the car or on the go.
We solve complex challenges alongside the most influential companies in the industry, using the most advanced algorithms in areas such as machine learning, biometrics and video processing, combined with world class software and silicon development.
The Edge SoC Silicon R&D team is looking for a hands-on, team oriented engineer with front-end SoC/ASIC RTL design/integration/implementation expertise. In this individual contributor role, candidate will have complete ownership of SoC/ASIC RTL designs (subsystem or full chip level) from specification to silicon validation. Candidate should have hands-on knowledge of Architecture/Micro-Architecture design, SoC/ASIC RTL design, Functional Simulation, Synthesis, Formal Verification, CDC Analysis, Static Timing Analysis and DFT at Physical partition or full chip level of SoC/ASIC. Candidate should have strong ability to learn and explore new technologies. Candidate is desired to have expertise in SoC/ASIC CAD tool flow development and ability to demonstrate good analysis and problem-solving skills. Candidate is desired to have an extraordinarily creative and motivated approach towards complex design problems. Candidate must be highly organized, able to prioritize, and juggle multiple work streams towards tight deadlines.
Candidate will be responsible for combination of following executables based on project requirements: